PCB Impedance Calculator
Calculate single-ended or differential PCB trace impedance, or solve the trace width needed for a target impedance.
Calculator is for preliminary engineering estimates only. Terms and Conditions
Closed-form transmission-line models are useful for preliminary design; confirm final controlled impedance with the PCB fabricator or a field solver.
Choose the calculation setup
Select the transmission-line geometry and whether to calculate impedance or solve trace width.
Enter the PCB stackup values
Use finished trace dimensions and the actual dielectric properties for the material and frequency of interest.
Dielectric height is the distance to the reference plane—not total board thickness. Differential spacing is edge-to-edge.
Result
Calculated impedance or solved trace width, followed by target, model, and applicable propagation checks.
Result details
- Check—
Show calculation stepsReview geometry ratios, equations, substitutions, inverse solving, and limitations
- Enter valid values to see the complete calculation.
PCB transmission-line cross-section
The diagram updates with the selected geometry. Dimensions are schematic and not drawn to fabrication scale.
Method, Sources, and Assumptions
Calculation basis, limitations, and final verification requirements.
Microstrip uses the Hammerstad–Jensen quasi-static model with finite-thickness correction. Symmetric stripline and differential modes use the displayed closed-form relationships. Results are preliminary design estimates.
- Use the actual finished PCB stackup, laminate design Dk, and fabricator geometry for production work.
- Closed-form equations do not replace a 2D/3D field solver or fabrication coupon/TDR verification.
Calculator guide
How to Use the PCB Impedance Calculator
The PCB impedance calculator above estimates the characteristic impedance of microstrip and symmetric stripline traces, calculates differential impedance for edge-coupled pairs, or works backward to solve the trace width needed for a target impedance. The core inputs are trace width, dielectric height, copper thickness, relative permittivity, and pair spacing for differential geometries.
Use the result as a preliminary controlled-impedance design value. PCB characteristic impedance is not the DC resistance of the copper trace; it is the voltage-to-current relationship of a traveling electromagnetic wave on a transmission line and is controlled by the line’s distributed capacitance and inductance. The calculator applies closed-form transmission-line models to an idealized cross-section, so final production geometry should be checked against the PCB fabricator’s actual laminate, finished dimensions, process tolerances, and controlled-impedance verification method.
- Supported geometry
- Single-ended microstrip, symmetric stripline, differential microstrip, and differential stripline.
- Primary output
- Characteristic impedance, differential impedance, or solved trace width.
- Best use
- Preliminary stackup checks, 50 Ω trace sizing, differential-pair sizing, and sensitivity studies.
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Choose the transmission-line geometry
Select single-ended microstrip, symmetric stripline, differential microstrip, or differential stripline so the equation and required inputs match the physical PCB cross-section.
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Choose what to solve
Use impedance-from-geometry mode when the stackup and trace dimensions are known. Use target-to-width mode when the stackup is fixed and you need a trace width for a requested characteristic or differential impedance.
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Enter the real stackup values
Use the signal-to-reference-plane dielectric distance, finished conductor dimensions when available, the laminate Dk used for impedance design, and edge-to-edge spacing for differential pairs.
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Review the result, tolerance, and warnings
Check whether the geometry is practical, whether the result falls inside your entered target tolerance, and whether the calculator reports a model-domain or manufacturability warning before carrying the geometry into layout.
PCB Impedance Inputs and Geometry
A correct impedance result starts with the correct cross-section. The most common input errors are using the wrong reference-plane distance, treating FR-4 as one fixed dielectric constant, or entering differential spacing using a different convention than the calculator.
- Trace width, W
- Use the finished conductor width for the controlled-impedance trace. In the forward mode, width is an input; in target-to-width mode, it is the solved output.
- Dielectric height, H
- For microstrip, use the trace-to-reference-plane dielectric distance. For this symmetric stripline implementation, H is the dielectric clearance on each side of the trace, not the full plane-to-plane spacing.
- Copper thickness, T
- Use finished trace thickness when it is available from the stackup. The calculator can accept mil, mm, µm, or copper weight; its 1 oz conversion uses 34.79 µm as a nominal thickness conversion.
- Relative permittivity, εr
- Enter the dielectric constant associated with the actual laminate construction and relevant frequency when available. FR-4 is a material family, not one universal Dk value.
- Pair spacing, S
- For the differential models, S is the edge-to-edge spacing between the two traces. Do not enter center-to-center pitch.
- Target impedance
- Used by the inverse width solver and by the optional tolerance comparison. Common-target presets only populate the target value; they do not verify an interface specification or automatically change the selected transmission-line geometry.
- Frequency
- In the calculator’s quasi-static impedance model, frequency does not change the calculated single-ended \(Z_0\). It is used only for applicable propagation outputs such as guided wavelength; it is not used to modify the differential impedance calculation.
Microstrip vs. stripline
Texas Instruments describes a microstrip as an outer-layer signal trace separated from its return plane by dielectric, while a stripline is an inner-layer trace with reference planes above and below it. The conductor dimensions and dielectric properties together determine characteristic impedance. TI’s controlled-impedance transmission-line guidance illustrates the same four geometry families used by this calculator.
PCB Impedance Calculation Method
The calculator uses analytical closed-form transmission-line models rather than a full electromagnetic field solver. Microstrip uses the Hammerstad–Jensen quasi-static formulation with finite copper-thickness correction; symmetric stripline uses the displayed logarithmic approximation; differential modes apply closed-form coupling corrections to the corresponding single-ended result.
For an ideal lossless transmission line, the underlying relationship can be summarized as \(Z_0=\sqrt{L’/C’}\): geometry and dielectric loading determine distributed inductance and capacitance per unit length, which in turn determine characteristic impedance.
Microstrip characteristic impedance
In plain language: the Hammerstad–Jensen method first accounts for the trace-width-to-height ratio, dielectric loading, and finite conductor thickness, then converts the effective geometry into characteristic impedance.
Qucs’ technical documentation describes the Hammerstad–Jensen microstrip equations and the finite strip-thickness correction used as the basis for this implementation.
Symmetric stripline approximation
The calculator defines H as the dielectric clearance from each trace face to the adjacent plane, so the modeled plane spacing is 2H + T.
Differential coupling corrections
The coupling terms reduce differential impedance below twice the isolated single-trace impedance. As S/H becomes large, the exponential term approaches zero and the differential result approaches 2Z0. These relationships are published in Texas Instruments controlled-impedance guidance.
- \(Z_0\)
- Single-ended characteristic impedanceThe transmission-line impedance of one microstrip or stripline trace.
- \(Z_{diff}\)
- Differential impedanceThe impedance presented by the edge-coupled differential pair in the selected approximation.
- \(W\)
- Trace widthFinished conductor width used in the cross-sectional model.
- \(H\)
- Dielectric heightReference-plane clearance defined by the active microstrip or symmetric stripline geometry.
- \(T\)
- Copper thicknessFinished conductor thickness used by the geometry model.
- \(S\)
- Differential pair spacingEdge-to-edge separation between the two coupled traces.
- \(\varepsilon_r\)
- Relative permittivityDielectric constant entered for the PCB material system.
- \(\varepsilon_{eff}\)
- Effective relative permittivityEffective dielectric loading calculated for single-ended microstrip propagation.
Worked Example: Solve a 50 Ohm Microstrip Width
Suppose an outer-layer microstrip must be approximately 50 Ω and the proposed stackup has 4 mil from the signal trace to its reference plane, 1 oz nominal copper, and relative permittivity 4.2. The calculator’s inverse solver can find the trace width that makes the Hammerstad–Jensen result converge on the target.
Inverse-solver procedure
- Choose Microstrip — single-ended and Trace width from target impedance.
- Enter the 50 Ω target and the stackup values above. The solver brackets a physically valid width range for the selected model.
- It repeatedly evaluates the Hammerstad–Jensen microstrip model and narrows the width interval until calculated impedance matches the target within the solver tolerance.
- The converged width is approximately 6.918 mil.
Result
Required trace width ≈ 6.918 mil
This is a preliminary width for the modeled stackup, not a universal 50 Ω PCB trace width. A different dielectric height, Dk, copper thickness, or transmission-line structure produces a different width.
How to Interpret PCB Impedance Results
The result is the characteristic impedance of the modeled transmission-line cross-section, not the DC resistance of the copper trace. In width-solve mode, the result is the geometry that makes the selected analytical model meet the requested target.
Width and impedance move oppositely
With H, T, and dielectric constant held constant, increasing trace width lowers impedance; decreasing trace width raises it. The verified 50 Ω example above demonstrates this directly.
Height and Dk matter too
With other geometry fixed, increasing trace-to-plane separation generally raises impedance, while increasing relative permittivity generally lowers impedance. This is why a trace width cannot be specified independently of the stackup.
Differential spacing controls coupling
For the calculator’s differential approximations, smaller S/H increases coupling and reduces differential impedance. As spacing grows, the result approaches twice the corresponding single-ended impedance.
| Input change | General effect | Reason to check it |
|---|---|---|
| Trace width W increases | Impedance decreases | Width is the usual geometry variable solved when the stackup is fixed. |
| Dielectric height H increases | Impedance generally increases | Using total board thickness instead of reference-plane distance can create a large error. |
| Relative permittivity εr increases | Impedance decreases | Use the material/fabricator value rather than assuming every FR-4 construction has the same Dk. |
| Differential spacing S increases | Zdiff approaches 2Z0 | Spacing convention and pair coupling materially affect the differential result. |
When does a PCB trace need controlled impedance?
Controlled impedance becomes important when a PCB interconnect behaves electrically like a transmission line, which depends strongly on signal edge rate and propagation delay rather than clock frequency alone. Fast rise and fall times can make reflection control important even when the nominal repetition frequency is comparatively low.
What the additional single-ended results mean
- Effective dielectric constant, εeff
- The effective dielectric loading calculated by the single-ended microstrip model. It is used to estimate propagation behavior and is not a coupled differential-mode permittivity solution.
- Propagation velocity and delay
- Estimated wave velocity and travel time per unit length derived from the effective dielectric loading of the applicable single-ended model.
- Capacitance and inductance per unit length
- Distributed line quantities derived from characteristic impedance and propagation velocity for the applicable single-ended result.
- Guided wavelength
- The estimated wavelength on the modeled line at the selected Frequency. It changes with Frequency even though the quasi-static \(Z_0\) result does not.
From Calculated Impedance to a Manufactured PCB
Real controlled impedance depends on the finished PCB, not only the nominal CAD cross-section. Lamination, etching, plating, actual dielectric thickness, actual material Dk, solder mask, and differential spacing can all move the manufactured impedance away from a preliminary analytical result.
Actual laminate and dielectric thickness
The electromagnetic field sees the fabricated dielectric system. Use the stackup supplied by the PCB fabricator when possible, including the actual signal-to-reference-plane spacing and the Dk value they use for impedance modeling.
Finished conductor geometry
Etching and plating can change finished width and thickness from nominal design values. Polar notes that controlled-impedance coupons are designed and fabricated to represent the same layer construction, dielectric separation, conductor geometry, and manufacturing process as the controlled-impedance structures on the panel.
Solder mask and surface structures
Surface coatings change the dielectric environment around a microstrip. The calculator’s four supported geometries are simplified analytical structures; a fabrication field solver can model coated and more complex cross-sections directly.
Vias, launches, and reference discontinuities
A straight trace can meet its target while vias, connectors, plane changes, or discontinuities create localized impedance changes. Those discontinuities are outside a simple uniform cross-section calculator.
How controlled impedance is verified with TDR
Polar Instruments describes production test coupons built with the same layer and trace construction as the controlled-impedance PCB. A time-domain reflectometer sends a fast electrical step into the coupon; impedance discontinuities reflect part of the signal, allowing impedance to be evaluated along the test structure.
Tektronix notes that TDR impedance readout is straightforward for a single controlled-impedance interconnect such as a PCB coupon, while real multi-segment interconnects can be more complex because multiple reflections affect the apparent profile.
| Method | Best use | What it cannot prove by itself |
|---|---|---|
| Closed-form calculator | Preliminary width and impedance estimates, inverse solving, and sensitivity checks. | The exact finished impedance of a real manufactured cross-section. |
| 2D field solver / fabricator model | Detailed cross-section modeling with actual dielectric layers, coating, and conductor geometry. | Whether the physical manufacturing process actually produced the modeled geometry. |
| TDR coupon measurement | Verification of the manufactured controlled-impedance process and representative test structure. | The local impedance of every via, bend, connector launch, and complex routed discontinuity on the board. |
Common PCB Impedance Calculation Mistakes
Most large errors come from entering the wrong physical geometry or treating a preliminary analytical model as if it were a final fabrication field solver.
Using total PCB thickness for H
Microstrip H is the trace-to-reference-plane dielectric distance. For this calculator’s symmetric stripline model, H is the clearance from the trace face to each adjacent plane.
Using center-to-center differential pitch
The differential spacing input is edge-to-edge spacing. Substituting center-to-center pitch increases S and changes the coupling correction.
Assuming FR-4 has one Dk
FR-4 covers many laminate constructions. Use the actual laminate or fabricator value appropriate to the controlled-impedance stackup instead of treating one generic number as universal.
Using nominal copper weight as exact finished thickness
Copper weight is convenient for early design, but finished conductor thickness can change with fabrication. Use finished thickness when the manufacturer provides it.
Confusing PCB impedance with DC resistance
Characteristic impedance describes a traveling wave on a transmission line. It is not the same as the ohmic resistance that produces voltage drop and I²R heating.
Assuming one trace width is always 50 Ω
A 50 Ω trace width depends on geometry, H, T, and dielectric properties. The 6.918 mil result in the example is valid only for that modeled stackup.
Expecting Frequency to change the quasi-static Z0 result
The calculator’s Frequency input provides propagation context in applicable single-ended modes; it does not add broadband dispersion or frequency-dependent loss to the characteristic-impedance model.
Accuracy, Assumptions, and Field-Solver Limits
This calculator is best used for preliminary controlled-impedance design, reverse width solving, and sensitivity checks. It does not model every fabrication detail or every high-frequency effect that can matter in a final PCB.
Analytical cross-section models
Microstrip uses a Hammerstad–Jensen quasi-static model with finite-thickness correction. Stripline and differential modes use the disclosed closed-form approximations. These are not full 2D or 3D electromagnetic solutions.
Uniform geometry assumption
The formulas model a uniform transmission-line cross-section. They do not include bends, neck-downs, vias, connector launches, anti-pads, plane splits, nearby copper, or local reference changes.
Differential propagation limits
The differential result applies coupling corrections to the single-ended geometry. The calculator intentionally does not report coupled odd-mode propagation delay, wavelength, inductance, or capacitance because the simplified model does not independently solve the coupled-mode effective permittivity.
Tolerance is a user requirement
The optional tolerance field compares the calculated value with the target you entered; it does not establish a universal PCB specification. Keysight’s PCB impedance measurement guidance discusses how controlled-impedance tolerances can tighten from ±10% toward ±5% or less in demanding applications.
Sources and Calculation Basis
The article and calculator use the same production method definitions. The worked 50 Ω example and width sensitivity values were recomputed from the final calculator model and reverse-checked with the forward calculation.
- Qucs Technical Documentation — Single Microstrip Line — Hammerstad–Jensen quasi-static microstrip impedance, effective dielectric constant, and finite strip-thickness correction.
- Texas Instruments — SN65MLVD203B Controlled-Impedance Transmission Lines — microstrip/stripline geometry definitions and the differential microstrip and differential stripline coupling approximations used by the calculator.
- Polar Instruments — Controlled Impedance PCB Design and Manufacture — production test coupons, representative PCB construction, fabrication variables, and TDR-based controlled-impedance measurement.
- Tektronix — TDR Test Primer — TDR interpretation, direct impedance readout for simple test structures, and multiple-reflection limitations in more complex interconnects.
- Keysight — Achieving Better Correlation for PCB Impedance Test — controlled-impedance measurement accuracy and the trend toward tighter impedance tolerances in high-speed PCB production.
PCB Impedance Calculator FAQ
These answers address common follow-up questions that affect how a PCB impedance result should be entered, interpreted, or verified.
What trace width gives 50 ohms on a PCB?
There is no universal 50 Ω PCB trace width. Width depends on the transmission-line geometry, distance to the reference plane, copper thickness, dielectric constant, and other fabrication details. For the worked microstrip example on this page, 4 mil dielectric height, 1 oz nominal copper, and εr = 4.2 produce a modeled 50 Ω width of about 6.918 mil.
Does a wider PCB trace increase or decrease impedance?
With the stackup and other dimensions held constant, a wider trace generally lowers characteristic impedance. In the verified worked example, increasing the solved width by 10% lowers the calculated impedance from about 50 Ω to 47.50 Ω.
What is dielectric height in a PCB impedance calculator?
For microstrip, dielectric height is the distance from the signal trace to its reference plane, not total PCB thickness. For this calculator’s symmetric stripline model, H is the clearance from each trace face to the adjacent reference plane.
What dielectric constant should I use for FR-4?
Do not assume one universal Dk for every FR-4 board. Use the value associated with the actual laminate construction and the PCB fabricator’s impedance model whenever possible, because material system, resin content, construction, and frequency can affect the applicable dielectric behavior.
Is differential impedance exactly twice the single-ended impedance?
No. Nearby traces are electromagnetically coupled, so the differential impedance depends on spacing as well as the single-trace geometry. In the calculator’s closed-form approximations, Zdiff approaches 2Z0 only as pair spacing becomes large relative to dielectric height and coupling becomes weak.
Why might my PCB manufacturer give me a different trace width?
The manufacturer may use actual laminate thickness, process Dk, finished copper geometry, plating and etch behavior, solder mask, and a fabrication-specific field solver. Adjusting trace width or dielectric construction to meet the specified impedance is normal controlled-impedance engineering; the target impedance is usually more important than preserving a preliminary calculator width.
How accurate is a PCB impedance calculator?
A closed-form calculator is useful for preliminary design, sensitivity studies, and independent checks, but accuracy depends on how closely the modeled geometry and dielectric properties match the finished PCB. Use the fabricator’s field-solver stackup and controlled-impedance measurement process when the production requirement is consequential.
When does a PCB trace need controlled impedance?
Controlled impedance is worth considering when the interconnect’s propagation delay is no longer negligible compared with the signal’s rise or fall time. Edge rate is often more important than nominal clock frequency because fast transitions contain high-frequency energy that can reflect from impedance discontinuities.
Does frequency change PCB trace impedance?
Real transmission lines can show frequency-dependent impedance and effective dielectric behavior because of dispersion and material loss. This calculator uses quasi-static impedance models, so Frequency does not change the calculated \(Z_0\); in applicable single-ended modes it is used for propagation context such as guided wavelength.
How is controlled PCB impedance measured?
PCB manufacturers commonly use controlled-impedance test structures or coupons and TDR-based equipment. A fast electrical step is launched into the structure, and the reflected signal is used to evaluate impedance changes along the line.