PCB Trace Width Calculator

Calculate required PCB trace width, allowable current, or temperature rise from current, copper thickness, layer location, and thermal limits, with resistance and voltage-drop checks.

Example values loaded Illustrative values are loaded so the calculator works immediately. Replace them before using the result for a real design.

Calculator is for informational and preliminary engineering purposes only. Terms and Conditions

\[ I=k(\Delta T)^{0.44}A^{0.725},\qquad W=\frac{A}{t} \]

This calculator implements the widely used IPC-2221 curve-fit approximation. IPC-2152 uses newer chart-based test data and correction factors and is not represented by this single equation.

1

Choose the calculation setup

Select the unknown and whether the trace is on an external or internal PCB layer.

Calculation setup

Required fields, equation, result label, and output units update with the selected solve mode.

IPC-2221 uses k = 0.048 for external traces and k = 0.024 for internal traces.

2

Enter the known values

Use continuous or RMS current for steady-state sizing. Field units may be mixed.

The example uses 1 A, 1 oz copper, a 10°C rise, and an external layer. Results update automatically.

Use the maximum continuous or RMS current through the trace.

1 oz/ft² copper is approximately 34.79 µm (1.37 mil).

Temperature rise is the conductor temperature above ambient, not absolute temperature.

Advanced Options

Optional; enables resistance, voltage-drop, and power-loss calculations.

Optional; used for conductor temperature and temperature-corrected resistance. Required when a maximum voltage drop is entered.

Optional; used to report voltage drop as a percentage of the rail voltage.

Optional in width mode; the larger thermal or voltage-drop width governs.

Optional in width mode; increases the current used for sizing.

%

Changing answer units does not change the underlying physical result.

3

Result

Primary answer first, followed by electrical checks, governing criteria, warnings, and calculation steps.

Required trace width
Example values are being calculated.

Result details

  • Check
Show calculation steps Review conversions, equations, substitutions, assumptions, and checks
  1. Enter valid values to see the complete calculation.
4

Trace Geometry and Copper Comparison

See the active trace layer and compare the selected solve result across common copper weights.

PCB trace cross-section Illustrative PCB cross-section showing the selected external or internal copper trace location.
Layer: External trace Copper: amber conductor Board: dielectric substrate
  1. Enter valid values to populate the comparison.
5

Method, Sources, and Assumptions

Calculation basis, coefficients, electrical-property assumptions, limitations, and final verification requirements.

Legacy IPC-2221 curve-fit estimate
External k = 0.048 Internal k = 0.024 b = 0.44 c = 0.725

The thermal solver uses the legacy IPC-2221-style empirical curve fit for preliminary conductor sizing. IPC-2152 is the dedicated IPC current-carrying-capacity standard and uses newer chart-based test data and correction factors rather than this single equation. Resistance uses standard-copper resistivity at 20°C with a linear temperature correction.

  • 1 oz/ft² copper is converted as approximately 34.79 µm thickness.
  • Copper resistivity is modeled as 1.7241 × 10⁻⁸ Ω·m at 20°C with temperature coefficient 0.00393/°C.
  • The IPC-2221 relation is empirical and does not fully model board material, plane proximity, airflow, mounting, adjacent hot traces, transient pulses, neck-downs, pads, vias, or fabrication tolerances.
  • For controlled-impedance or high-frequency traces, verify impedance and AC loss separately.
  • For consequential designs, verify final geometry against the current IPC guidance, manufacturer stack-up data, thermal testing or simulation, and qualified engineering judgment.

Calculator guide

PCB Trace Width Calculator Guide

The PCB trace width calculator above estimates the copper width needed to carry a selected current at a selected temperature rise, or it can solve backward for estimated current capacity or temperature rise. For the main width calculation, the minimum inputs are current, finished copper thickness, allowed temperature rise, and whether the trace is on an external or internal layer.

The thermal result is a preliminary conductor-sizing estimate based on the legacy IPC-2221 curve fit. Trace length does not enter that thermal width equation, but it does control resistance, voltage drop, and \(I^2R\) loss, so a thermally adequate trace can still be too resistive for a low-voltage power rail.

Primary output
Required trace width in mm, mil, µm, or inches.
Primary thermal inputs
Current, copper thickness, temperature rise, and layer location.
Important check
Verify voltage drop, neck-downs, vias, finished copper, and real board thermal conditions.

How to Use the PCB Trace Width Calculator

Choose the quantity you need, enter the geometry and thermal inputs that apply to the real current path, then use the electrical checks to decide whether the thermal minimum is sufficient for the circuit.

  1. Select the solve mode and trace layer

    Use Required trace width when the current is known, Estimated current capacity when the existing width is known, or Temperature rise when current and geometry are known. Select external or internal because the calculator uses different curve-fit constants for those two cases.

  2. Enter the current and finished copper geometry

    For steady-state sizing, use the maximum continuous or RMS current that must pass through the trace. Enter the finished copper thickness when it is known; the calculator accepts copper weight or direct thickness units and converts them to a common physical thickness.

  3. Choose an allowed temperature rise

    Temperature rise is the increase above the local ambient condition, not the absolute board temperature. A 10°C rise at 25°C ambient corresponds to an estimated 35°C conductor temperature in this simplified model, while the same 10°C rise at a much hotter local ambient produces a much hotter conductor.

  4. Use Advanced Options for electrical constraints

    Trace length enables resistance, voltage-drop, and power-loss results. System voltage lets the tool express drop as a percentage. In width mode, an optional maximum voltage drop can make the voltage-drop requirement govern instead of the thermal width, and an optional current design margin increases the current used for sizing.

  5. Check the whole current path before routing

    Compare the calculated requirement with the narrowest copper section, pad connections, thermal-relief spokes, vias, connectors, planes, and the fabricator’s finished-board capabilities. The widest section of a route cannot compensate for a severe bottleneck elsewhere in series.

PCB Trace Width Formula and Calculation Method

The calculator uses the familiar legacy IPC-2221 empirical curve fit. It first solves for the copper cross-sectional area needed for the selected current and temperature rise, then divides that area by copper thickness to obtain trace width.

Current-capacity relationship

\[ I=k(\Delta T)^{0.44}A^{0.725} \]

Plain language: estimated current capacity increases as the allowed temperature rise and copper cross-sectional area increase.

The calculator uses \(k=0.048\) for external traces and \(k=0.024\) for internal traces. Cross-sectional area \(A\) is expressed in square mils for this empirical relationship. Texas Instruments documents the same legacy IPC-2221 coefficient set and exponents in its PCB thermal-design guidance: TI PCB trace temperature-rise guidance.

Solve for required trace width

\[ A=\left(\frac{I_d}{k(\Delta T)^{0.44} }\right)^{1/0.725}, \qquad W=\frac{A}{t} \]

The width calculation uses design current \(I_d\), determines the required copper area, then divides by finished copper thickness \(t\). If no design margin is entered, \(I_d\) equals the entered current.

Resistance, voltage drop, and power loss

\[ R=\rho_T\frac{L}{Wt}, \qquad V_{\mathrm{drop} }=IR, \qquad P=I^2R \]

Length changes resistance and voltage drop even though it does not appear in the legacy thermal width curve fit. The calculator temperature-corrects copper resistance when ambient temperature is available.

\(I\)
Current Continuous or RMS current carried by the trace for the steady-state calculation. Auser input
\(I_d\)
Design current Entered current after applying the optional current design margin in width mode. Aderived value
\(\Delta T\)
Allowed temperature rise Modeled conductor temperature increase above local ambient. °C differenceuser input
\(A\)
Copper cross-sectional area Trace width multiplied by finished copper thickness. mil² in curve fitderived value
\(W\)
Trace width Finished conductor width used for the rectangular cross-section model. length
\(t\)
Copper thickness Finished copper thickness, including relevant copper plating rather than only a nominal starting-foil label when actual fabrication data is available. length
\(k\)
Layer coefficient Empirical constant selected from the legacy external or internal IPC-2221 curve fit. 0.048 external; 0.024 internal
\(\rho_T\)
Copper resistivity at conductor temperature Electrical resistivity used for the trace-resistance check after temperature correction. Ω·mderived property

Worked PCB Trace Width Example

Consider the calculator’s illustrative starting case: a 1 A external trace using 1 oz/ft² copper, an allowed 10°C rise, 50 mm trace length, 25°C ambient, and a 5 V rail, with no added current margin and no maximum-voltage-drop constraint.

Given values

Current
1.00 A
Copper
1 oz/ft² = 34.79 µm in the calculator
Temperature rise
10°C
Layer
External, \(k=0.048\)
Trace length
50 mm
Ambient
25°C
Find
Required trace width and electrical loss checks

Calculate the required copper area

\[ A= \left( \frac{1.00} {0.048(10)^{0.44} } \right)^{1/0.725} =16.296\ \mathrm{mil^2} \]

Convert area to trace width

\[ t=\frac{34.79\ \mu\mathrm{m} }{25.4\ \mu\mathrm{m/mil} } =1.3697\ \mathrm{mil}, \qquad W=\frac{16.296}{1.3697} =11.898\ \mathrm{mil} \]

Result

Required width ≈ 0.3022 mm (11.90 mil)

At the same modeled 10°C rise and 25°C ambient, the calculator’s 50 mm electrical check gives an estimated hot resistance of about 86.82 mΩ, an 86.82 mV drop at 1 A, about 86.82 mW of \(I^2R\) loss, and an estimated conductor temperature of 35°C.

How to Interpret the Trace Width Result

The result is the width required by the selected simplified model and constraints, not an automatic fabrication instruction. In width mode, the calculator distinguishes the legacy thermal width from an optional voltage-drop width and uses the larger requirement when a maximum voltage drop is entered.

What the number means

For the thermal calculation, the width is the rectangular copper width needed to provide the modeled cross-sectional area at the selected finished thickness and temperature-rise limit. Increasing copper thickness decreases the required width for the same required cross-sectional area.

How sensitive is width to current?

Holding \(k\), copper thickness, and temperature rise constant, width is proportional to \(I^{1/0.725}\), or approximately \(I^{1.379}\). A 10% increase in design current therefore raises the thermal width by about 14% in this curve-fit model, not merely 10%.

Fast sanity check

If current rises while every other input stays fixed, required width must rise. If copper thickness rises while current and temperature rise stay fixed, required width must fall. A result that violates those directions indicates an input, unit, or mode mismatch.

What Changes PCB Trace Current Capacity in Real Boards

Real PCB temperature is controlled by more than trace width. IPC-2152 explicitly treats current, conductor size, temperature, and acceptable rise as a thermal-design problem, while manufacturer notes and measured boards show that actual finished copper and surrounding copper can differ from simple nominal assumptions.

Finished copper thickness

The calculator converts 1 oz/ft² to 34.79 µm, while engineering references commonly round 1 oz copper to about 35 µm. Outer-layer plating can change the finished thickness, so use the fabricator’s finished-copper information when resistance or thermal margin is important.

Local ambient and nearby heat

Temperature rise is only the self-heating increase above ambient. A trace next to a hot regulator, power transistor, resistor, or transformer can start from a local temperature well above room temperature, reducing the available thermal headroom.

Copper planes and spreading

Nearby planes, pours, and multilayer copper can spread heat and change the real thermal environment. That is one reason a simple width equation cannot capture every board stack-up or copper distribution.

Vias and layer transitions

A wide top-layer trace may still feed through a much smaller plated-via cross-section when the route changes layers. Verify the via barrel, count of parallel vias, pad geometry, and current sharing separately.

Neck-downs and thermal reliefs

A wide route that narrows sharply around a pad, connector, component lead, or thermal-relief spoke can concentrate resistance and heating. Evaluate the smallest effective copper cross-section in the current path rather than only the nominal trace width.

Transient or pulsed current

The calculator is a steady-state curve-fit tool. Short pulses involve thermal mass and transient heat flow, so a pulse waveform should not be reduced to a claimed steady-state current rating without a transient thermal check appropriate to the application.

PCB trace bottleneck diagram A wide copper trace narrows through a short neck-down before reaching a pad, illustrating that the smallest series copper section can control resistance and heating.
Wide trace → neck-down → pad. The route should be checked as a series current path. A short neck-down, thin thermal-relief connection, via transition, or connector pad can become the controlling copper section even when most of the trace is much wider.

Choosing a Practical PCB Trace Width

Use the calculated width as a requirement to compare against the actual routing strategy. The final layout may need more copper because of voltage drop, fabrication tolerance, bottlenecks, thermal environment, or because a copper pour or plane is more practical than a very wide routed track.

Calculated requirement

The thermal width is obtained from the selected current, layer coefficient, temperature rise, and finished copper thickness. If you enter a maximum voltage drop, the calculator also evaluates the width needed for the electrical drop constraint and reports which requirement governs.

Layout choice

A larger routed width, copper pour, plane, heavier copper, or parallel copper paths may be appropriate when the calculated width is difficult to route or when lower resistance is desired. Increasing width beyond the calculated minimum is a design choice unless a project rule, standard, manufacturer requirement, or verified electrical limit specifically requires it.

When voltage drop controls the design

For a given copper cross-section, resistance increases with length. A long trace on a low-voltage rail can therefore require more copper for power integrity than for thermal rise. This is why the calculator keeps trace length out of the IPC thermal equation but uses it in \(R=\rho L/A\), voltage drop, and power-loss calculations.

For example, a 100 mV drop is only 2% of a 5 V rail but 10% of a 1.0 V rail. The same thermal trace can therefore be acceptable for one circuit and unacceptable for another because the allowable electrical drop is a project-specific power-integrity requirement.

When a pour or plane makes more sense

If the required width becomes a large fraction of the available board area, forcing the result into a conventional routed track may be inefficient. High-current paths often benefit from deliberately shaped pours, planes, heavier copper, multiple layers tied with suitable vias, or other bus structures. Those choices need their own current-distribution and thermal review rather than assuming a wide polygon behaves exactly like an isolated rectangular trace.

Check the entire current path

  • Verify the routed trace width and the narrowest neck-down.
  • Check thermal-relief spokes and pad entry or exit geometry.
  • Check via barrels, via count, and layer-transition current sharing.
  • Verify connector contacts and component leads can carry the required current.
  • Check trace or pour length against the allowable voltage drop.
  • Use finished copper thickness rather than assuming nominal foil thickness is exact.
  • Account for local ambient temperature and nearby heat-producing components.

Keep current capacity separate from impedance and spacing

A trace width selected for current and temperature is not automatically correct for controlled impedance. High-speed and RF traces depend on stack-up, dielectric properties, reference-plane geometry, and conductor dimensions. Likewise, conductor width does not determine high-voltage creepage or clearance. For the broader layout workflow, see the Turn2Engineering PCB Design guide.

PCB Trace Width by Current and Copper Weight

The table below is a controlled recalculation of this calculator’s legacy IPC-2221 relationship using 1 oz/ft² copper, a 10°C allowed rise, no current margin, and the calculator’s 34.79 µm-per-ounce conversion. It is a quick cross-check, not a substitute for entering the actual board conditions.

Calculated trace width for 1 oz/ft² copper at 10°C rise using the calculator’s legacy IPC-2221 curve fit
Current (A) External width (mil) External width (mm) Internal width (mil) Internal width (mm)
0.54.570.11611.900.302
111.900.30230.950.786
230.950.78680.522.05
354.151.38140.863.58
5109.542.78284.957.24
10284.957.24741.2818.83

Under this specific curve fit, switching from the external coefficient \(k=0.048\) to the internal coefficient \(k=0.024\) multiplies required cross-sectional area—and therefore width at fixed copper thickness—by \(2^{1/0.725}\approx2.60\). That 2.60 factor is a mathematical consequence of this legacy model, not a universal physical ratio for every multilayer PCB construction.

How much current can a PCB trace carry?

The reverse calculation below uses 1 oz/ft² external copper, a 10°C allowed rise, and the same legacy IPC-2221 curve fit. These are model outputs under stated assumptions, not universal current ratings for every PCB.

Estimated current capacity for 1 oz/ft² external copper at 10°C rise
Trace width Width (mm) Estimated current (A)
10 mil0.2540.882
20 mil0.5081.46
50 mil1.272.83
1 mm1.0002.38
100 mil2.544.68

1 oz vs 2 oz copper trace width

At fixed current, layer, and temperature rise, this curve fit first determines a required copper cross-sectional area. Doubling finished copper thickness from 1 oz/ft² to 2 oz/ft² therefore halves the required width for the same modeled area.

External trace width at 10°C rise: 1 oz/ft² vs 2 oz/ft² copper
Current (A) 1 oz width (mm) 2 oz width (mm)
10.3020.151
20.7860.393
31.380.688
52.781.39
107.243.62

Copper weight and nominal thickness

PCB copper weight is commonly expressed in ounces per square foot. The calculator uses 34.79 µm for 1 oz/ft²; many engineering documents round the same nominal copper weight to approximately 35 µm or 1.4 mil. Finished external copper can differ because of plating and fabrication process, so nominal weight should not be treated as a precision thickness measurement.

Nominal copper thickness using the calculator’s 34.79 µm per oz/ft² conversion
Copper weight (oz/ft²) Calculator thickness (µm)
0.517.40
134.79
269.58
3104.37
4139.16

For context, Texas Instruments documents 1 oz copper as about 1.4 mil or 35 µm and notes that plating can change the effective finished copper thickness; see TI AN-1229, SIMPLE SWITCHER PCB Layout Guidelines.

IPC-2221 vs IPC-2152

Do not treat IPC-2152 as a new set of constants to plug into the same IPC-2221 equation. IPC-2152 is the dedicated IPC standard for determining current-carrying capacity in printed-board design and is based on conductor-temperature-rise data and broader thermal variables rather than one universal replacement equation.

Legacy IPC-2221 curve fit used here

This calculator uses the familiar empirical relationship with \(k=0.048\) for external conductors, \(k=0.024\) for internal conductors, and exponents 0.44 and 0.725. It is fast, transparent, reversible, and useful for preliminary sizing and consistency checks.

IPC-2152 current-carrying-capacity guidance

IPC-2152 states that its purpose is to determine appropriate finished-board conductor size from required current-carrying capacity and acceptable conductor temperature rise. Its approach is built around test data and thermal correction factors, which makes real board construction more important than in the single legacy curve fit.

Current IPC document status

IPC’s revision table lists IPC-2221C as the December 2023 revision of the Generic Standard on Printed Board Design. The same IPC table lists IPC-2152, originally issued in August 2009, as No Longer Maintained. That status is important context when documenting a design basis; it does not turn the legacy IPC-2221 curve-fit equation into an IPC-2152 equation.

Assumptions, Limits, and Verification

The calculator is a preliminary engineering model. It can make the thermal relationship and electrical losses transparent, but it cannot certify the current path, predict every board temperature, or replace fabrication and hardware verification.

Rectangular uniform conductor

The width calculation treats the trace as a uniform rectangular copper cross-section. Etching, plating distribution, neck-downs, pads, pours, and irregular geometry can make the real current density nonuniform.

Steady-state thermal estimate

The IPC curve fit is used as a steady-state estimate. It does not model transient pulse heating, time constants, airflow changes, enclosure heating, or the full thermal network of the assembled PCB.

Resistance model

The calculator uses copper resistivity near 20°C and a linear 0.00393/°C temperature coefficient for the resistance check. NIST documents 0.00393 at 20°C for standard copper and describes linear behavior over the conventional temperature range used for copper-wire tables.

Voltage drop is a separate constraint

The thermal curve does not know the rail’s allowable voltage loss. A width that satisfies the selected temperature rise can still fail a power-integrity requirement, especially on long, low-voltage, high-current paths.

Vias and connectors are not validated

Layer changes, connector contacts, component leads, thermal spokes, vias, and plane transitions can introduce smaller conductive sections or additional contact resistance that the trace-width result does not verify.

Manufacturing capability remains project-specific

The calculator does not decide the fabricator’s minimum width, copper tolerance, finished plating, impedance process, or registration capability. Use the selected board house’s current stack-up and design rules for release.

PCB Trace Width Calculator FAQ

These questions address common trace-width decisions that are not fully answered by a single width result.

How wide should a PCB trace be for 1 amp?

Under this calculator’s legacy IPC-2221 curve fit, 1 A on 1 oz/ft² external copper with a 10°C allowed rise and no current margin gives about 11.90 mil, or 0.302 mm. An internal trace under the same simplified assumptions gives about 30.95 mil, or 0.786 mm. Change copper thickness, temperature rise, layer, or design current and the answer changes.

How wide should a PCB trace be for 5 amps?

For 1 oz/ft² external copper and a 10°C rise, the same calculator relationship gives about 109.54 mil, or 2.78 mm, at 5 A. For an internal trace, the simplified result is about 284.95 mil, or 7.24 mm. At this scale, also evaluate voltage drop, copper pours or planes, vias, terminals, and whether heavier copper is a better layout choice.

Does PCB trace length affect current capacity?

Trace length is not an input to the legacy IPC-2221 thermal curve fit used by this calculator. It does affect electrical resistance, voltage drop, and \(I^2R\) power loss through \(R=\rho L/A\). A longer trace can therefore require a wider cross-section for power integrity even when the thermal width result is unchanged.

What temperature rise should I use for a PCB trace?

Use a rise limit that is justified by the real local ambient, laminate and component temperature limits, reliability targets, and the rest of the thermal design. A 10°C entry means 10°C above local ambient; it is not a universal safety limit. The hotter the surrounding board already is, the less absolute temperature headroom remains.

Is 1 oz copper exactly 35 µm thick?

It is a nominal copper-weight description, not a guarantee that every finished trace measures exactly 35 µm. This calculator converts 1 oz/ft² to 34.79 µm. Engineering references commonly round 1 oz to about 35 µm or 1.4 mil, and outer-layer plating can change the final copper thickness.

Should an internal PCB trace be wider than an external trace?

In this legacy IPC-2221 curve-fit model, yes. The internal coefficient is 0.024 versus 0.048 for external traces. At fixed current, copper thickness, and temperature rise, that coefficient change makes the calculated internal width about 2.60 times the external width. Real multilayer thermal behavior can differ, which is one reason IPC-2152 uses more detailed test-data context.

Should I use peak, average, or RMS current?

For steady DC, use the maximum continuous current expected in the trace. For a varying current where resistive heating is the concern, RMS current is the relevant electrical-heating measure because power follows \(I^2R\). Very short or unusual pulses can require transient thermal analysis rather than a steady-state trace-width equation.

How much current can a 10 mil or 20 mil PCB trace carry?

Using this calculator’s legacy IPC-2221 curve fit with 1 oz/ft² external copper and a 10°C allowed rise, a 10 mil trace corresponds to about 0.882 A and a 20 mil trace to about 1.46 A. These are calculation-model estimates under those exact assumptions, not universal safe-current ratings.

Is 2 oz copper better than making the trace wider?

Either more width or more copper thickness can increase conductor cross-sectional area. Under this calculator’s thermal curve fit, doubling finished thickness from 1 oz/ft² to 2 oz/ft² halves the required width for the same current and temperature-rise target. The better layout choice depends on board area, fabrication cost and capability, voltage drop, stack-up, current distribution, and the rest of the current path.

Can I use a copper pour instead of a very wide trace?

Often, yes, but a pour should be evaluated as real geometry rather than assumed to be an equivalent isolated trace. Check its minimum neck width, thermal reliefs, current entry and exit points, plane connections, via transitions, and whether current actually spreads through the available copper.

Does PCB trace width determine controlled impedance?

No. Width is one part of transmission-line geometry, but controlled impedance also depends on dielectric thickness and permittivity, copper thickness, reference-plane location, and whether the structure is microstrip, stripline, differential, or another geometry. A current-capacity width should be checked separately against the required impedance.

Does trace width determine PCB clearance or creepage?

No. Width addresses conductor cross-section and related electrical/thermal behavior. Clearance and creepage address spacing and insulation between conductors and are controlled by different design requirements, voltages, materials, environments, and applicable standards.

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